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White Paper by David Berry

Power averaging with regulation: a smart solution for pulsed loads

Power averaging image

If your power supply is designed only for known peak-power demand and not steady‑state load, your design probably is not optimized for efficiency. Furthermore, your power source is probably larger than it needs to be. If small size and weight are important, you need to consider power averaging.

Introduction

Power averaging with regulation consistently improves efficiency and reduces the footprint of your power supply. What could you do with more space? What is the long term cost savings of improved efficiency? Power systems that supply pulsed loads can be smaller, lighter and more cost effective through the use of power averaging. When a power system is designed to regulate a voltage to a particular load that demands a certain power level, usually this power level is constant: if the load demands 1kW, then the power system is designed to deliver a maximum of 1kW. But in systems where the power levels fluctuate quite often and the power fluctuations are periodic-pulsed where the peak power is known, power averaging allows the designer to supply the average power to a pulsing load.

In a power-averaging architecture, the peak power is delivered and averaged through a capacitor that is placed at the output of the power supply. During the peak power demand the capacitor delivers power to the load, and the supply replenishes the energy in the capacitor. When the capacitor is delivering energy, the voltage across the capacitor and the load will drop since the capacitor isn’t regulating the voltage. The power supply will deliver power continually at a constant rate equal to the average current. The voltage drop across the capacitor is equal to the delta between the average power and the peak power for the duration of the pulse. The capacitor is recharged at a constant rate during the off time of the pulse.

Increase efficiency with power averaging

Power averaging is an excellent option when the load can handle variations in voltage, as in the case of a load consisting of multiple downstream regulators. If the load cannot handle the voltage droop, however, the system will fail. The inclusion of regulation in power averaging systems through the use of a non-isolated regulator and a fixed‑ratio voltage isolator solves this problem easily with an additional benefit in many cases: increased overall system efficiency. For example, in many pulsed radar applications, the radar is most efficient at a particular voltage. If the averaging capacitor is feeding the radar directly, the radar will become less efficient as the voltage drops. Adding regulation will allow the radar to operate at its most efficient point throughout the entire pulse.

In the proposed solution, a Sine Amplitude Converter (SAC™) and ZVS Buck-Boost regulator can be stacked in series with the capacitor, providing the full current but only compensating for the voltage drop, which is a fraction of the power. When designing a power system for power averaging with regulation, the designer must take into account several important factors: the size of the bulk capacitor, the voltage and current ranges of the isolator and the bandwidth of the control loop for the non‑isolated regulator.

Figure 1 shows the block diagram for power averaging with regulation. U1 is the averaging supply that recharges the capacitor with the average power needed for the application. U1 is current limited and power limited to protect the source. U2 is the non‑isolated regulating module that monitors the load voltage through +S and –S and regulates the load voltage through U3 which is the fixed‑ratio Sine Amplitude Converter. U3 has its output in series with the bulk pulse capacitor. When the load demands a current pulse and the bulk pulse capacitor’s voltage drops, U2 raises the output voltage of U3 in inverse proportion to the capacitor drop and keeps the voltage at the load constant throughout the pulse.

Block diagram for power averaging with regulation image

Figure 1: Block diagram for power averaging with regulation.

Correctly sizing bulk capacitance

The capacitance needed for the application can be represented by Equation 1, where C is the capacitor value and P is the power delivered by the capacitor. The difference between T1 and T2 is the load‑demand duration. The difference between V1 and V2 is the voltage drop across the capacitor during power delivery. In Equation 1 it is assumed that the average power contributed by power supply U1 is negligible during the pulse. When the load demands power, the capacitor will deliver a greater portion of the load current because the DC-DC converter U1 will go into current limit while feeding the capacitor and the load. As the capacitor delivers both the load current and current to U2, its voltage will begin to fall. The capacitor must therefore be sized so that the voltage across the capacitor stays within the input voltage range of U2. When considering the power (P) that the capacitor must deliver, the design must take into account the power delivered to the input of U2. This power is also drawn from the capacitor. The load power during the pulse is the cap voltage plus U3 output voltage times the load current. The power level of U2 and U3 can be relatively small compared to the overall power delivered by the capacitor since the output voltage of U3 will be small. The U2 and U3 power levels will change as the voltage across the cap changes. The more U3 compensates, the more power is demanded through U2.

Equation 1:

Vicor-white-paper-image-power-avr-pulsed-loads-Eq1.svg

Isolator voltage and current ranges

When considering the configuration of U2 and U3, the design must take into account the input/output range of U2 and the output current of U3. Since U2 is powered from the capacitor, it must have the input voltage range of V1 and V2 from Equation 1. If the capacitor voltage is allowed to drop from 48VDC down to 45VDC, then U2 will need to have that same input range or wider.

In Figure 1 the output of U2 feeds the fixed‑ratio isolator U3. Once U2 senses the voltage drop at the load, it will compensate by increasing the output voltage of U3. Since U3 is a fixed‑ratio isolator, the output voltage is the input voltage multiplied by the ratio. If the ratio of U3 is 1/12, and the input voltage is 48VDC then the output voltage is 48/12 or 3VDC. A fixed‑ratio isolated converter will divide the input voltage and multiply the input current. With a ratio of 1/12, the U3 input current will be multiplied by 12. The voltage trim compensation range of U2 and U3 must be wide enough to compensate for the capacitor voltage drop. If the capacitor is allowed to drop by 4VDC then the combination of U2 and U3 has to be able to compensate for this drop. The wider the trim range or compensation range of U2 and U3, the more flexible the system can be with respect to capacitor values and technologies. For example, the capacitor’s internal series resistance can be higher since U3 is compensating for the voltage drops.

Regulator control-loop bandwidth

The combination of U2 and U3 has to deliver the full load current and portion of the load voltage in a rapid and controlled manner. This is where the U2 control plays an important role in the performance of the power averaging system. When the load demands current, it is typically in the time frame of hundreds of nanoseconds to single‑digit microseconds, and for a duration of hundreds of microseconds to milliseconds. In these pulsed-load applications, the load levels are typically no-load to full-load for the duration of the pulse. The U2 control loop must be tuned to control the voltage over this range as well as the changing input voltage. In many cases the control loop internal to the U2 power module is sufficient to handle these load steps with minimal undershoot and overshoot. In cases where the internal control loop isn’t fast or stable enough to regulate the load voltage, an external control loop can be implemented. There are power modules that give the designer access to the internal modulator so an external control can be configured to drive the powertrain. This gives a designer the ability to compensate an external control loop for the best system performance.

U2 can be designed to have the best transient response for the system, but U3, the fixed‑ratio voltage converter, must deliver the current and voltage. There are fixed‑ratio voltage transformation modules designed with very low path inductance and with high switching frequencies to deliver energy from input to output very rapidly. They can deliver hundreds of amps in nanoseconds. This combination in addition to being isolated makes this converter perfect for regulating the load voltage.

Figure 2 shows the power averaging with regulation configuration and test results. U1 in Figure 2 is a current-limited device set to 160W. This device recharges the 110mF pulse capacitor, C. U2 in Figure 1 is configured to regulate the load voltage to 48VDC. The load current is pulsing from 0.5A to 60A. Channel 3 is the pulsed load current, Channel 1 is the pulse capacitor voltage, Channel 2 is the U1 input current and Channel 4 is the load voltage. As shown in the Figure 2 scope plot, the load voltage is regulated during the entire pulse width even as the capacitor sags by 2V. Figure 2 also shows the effect of capacitance ESR in the system. The rapid change in voltage shown in Channel 1 at the beginning and end of the power pulse is due to the ESR of the capacitor. Using capacitance with lower ESR will reduce the rapid change in voltage.

Power averaging with regulation configuration image

Figure 2: Power averaging with regulation configuration and test results.

Conclusion

Power averaging is an excellent option for configuring a system to power pulsed loads, since it allows the designer to build a system that is small, power dense and very efficient. It is a straightforward approach when the load can tolerate a drop in voltage, but if the load is sensitive to voltage drop, adding regulation to the system with a non‑isolated regulator and a fixed-ratio voltage converter will allow the designer to retain the benefits of power averaging without sacrificing system stability.

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