High density, modular testing for CPUs, GPUs, and SoCs

Semiconductor manufacturers rely on high-density test systems to support their growing portfolios of increasingly complex products. AI processors, CPUs, GPUs, SoCs and mobile processors are adding greater functionality including RF connectivity, power management and mixed-signal processing. To support these varied IC functions, ATE systems require advanced PDNs to handle the many different power and voltage levels.

Modularity of these testers is also becoming critical, as testers switch from testing AI processors that draw 1,000A at 1V to mixed-signal SoCs, at a fraction of the current of processors, that are extremely sensitive to EMI. The Vicor patented Sine Amplitude Conversion (SAC) topology, inherently low-noise due to its soft switching at high frequency, greatly reduces false test results due to high EMI.

The power delivery network

Instead of attempting the difficult task of increasing the tapped-out efficiency of a front-end ATE power supply, a PDN was architected to use an intermediate 48V bus for better efficiency from 48V to the point-of-load. An array of two Vicor DCM3623 isolated, regulated DC-DC converter modules deliver over 600W of power at 92.7% efficiency at full load. In the same PDN, the Vicor fixed-ratio DC-DC modules transform 48V to a large variety of point-of-load requirements from 1V to 12V at 96% efficiency. Vicor’s inherently low noise SAC topology and advanced packaging technology, combined with planar magnetics and a low profile, greatly simplify and improve thermal management.